DRAM-Less SSDs Can Still Use Host RAM: What HMB Changes

DRAM-less names the drive design, not every memory it can use

The apparent contradiction disappears once the location is named. KIOXIA's December 2019 BG4-versus-BG3 client-SSD brief, Revision 1.3, describes the BG4 using HMB without integrated DRAM. Host memory helps it manage the SSD's flash. Figure 1 places the HMB region in the host's DRAM, across the PCIe connection from the SSD controller and NAND.

This is a historical client-device example. It establishes that a controller can use memory outside the drive; it supplies no enterprise recommendation or performance equivalence for an offered SSD. The brief identifies BG4 with NVMe Revision 1.3b. The protocol wording discussed next comes separately from Base Specification 2.0.

For an offer, ask what the phrase without DRAM actually excludes. An answer about components integrated into the SSD leaves the host-memory question open. A useful architecture description identifies both.

References: [HM2]

Assigned host memory has a specific user

NVM Express Base Specification 2.0, section 8.9, defines HMB as host memory assigned for the controller's exclusive use. Its use is vendor-specific. Host software can reclaim the ranges after the controller releases them.

The memory remains on the host, but those assigned bytes are not simultaneously ordinary application workspace. Location and use answer different questions: host RAM identifies where the resource resides; the HMB assignment identifies who may use that portion.

KIOXIA's flash-management example gives one documented purpose. Do not turn it into a rule that every HMB implementation holds identical mapping structures, or that HMB universally buffers pending user writes. The selected product needs its own explanation of what it keeps there. The word buffer alone cannot supply that explanation.

References: [HM1][HM2]

The 2021 Samsung 980 names two different buffer locations

Samsung's March 10, 2021 consumer announcement calls the 980 a drive without DRAM and describes HMB using the host processor's DRAM. Separately, it describes Intelligent TurboWrite 2.0 as allocating a buffer storage area inside the drive. Its listed interface is PCIe Gen.3.0 x4, NVMe 1.4.

Samsung's consumer-SSD FAQ explains Intelligent TurboWrite in terms of internal SLC buffering before data moves to multi-bit cells. That NAND staging function differs from an HMB allocation in host DRAM. A DRAM-less label therefore does not exclude an in-drive NAND write buffer.

Keep the two locations on separate lines of the offer. A TurboWrite region size cannot be entered as the SSD's host-RAM assignment. Conversely, an HMB quantity cannot supply the available SLC region or the rate after that region fills. The related SLC-cache article develops the transfer-duration decision; this historical 980 example is used here to distinguish the resources.

References: [HM3][TW1]

Capability does not establish the delivered assignment

Section 8.9 permits host software to provide less memory than requested, or none, and requires the controller to function without host-memory resources. That requirement supplies no equal-speed promise.

Separate the offered drive's HMB capability from the supported server and host-software combination, then distinguish a proposed assignment from one established for the delivered configuration. A product feature list alone leaves the last question unresolved.

Have the supplier and platform owner identify the applicable product documentation, host-software support and basis for any stated memory quantity. If the performance evidence assumes HMB use, the comparison needs that condition attached. Evidence for another host arrangement cannot establish the offered arrangement's result.

References: [HM1]

Eight 64 MiB HMB assignments use 0.5 GiB of host RAM

HM-210 is an invented accounting example with exactly 128 GiB of host memory and eight SSD controllers, each assigned 64 MiB at the illustrated instant. Stipulate that all eight HMB regions exist simultaneously and are disjoint. These are assumed allocations, not product defaults or observations.

Using binary units, 1 MiB is 1,048,576 bytes and 1 GiB is 1,024 MiB. The assignments total 8 x 64 MiB = 512 MiB = 0.5 GiB. Subtracting only those regions leaves a gross remainder of 128 - 0.5 = 127.5 GiB before every other system and application demand.

The remainder is a bookkeeping subtotal, not observed free RAM or guaranteed application space. Operating-system needs, other allocations, placement restrictions and allocation-time conditions are outside this account.

Adding the 0.5 GiB to the 128 GiB host total would count those bytes twice. The assignments add neither SSD capacity nor GPU HBM. No SSD capacity was supplied, so the example cannot establish an HMB-to-SSD-capacity ratio or a memory-sizing prescription.

References: [U1]

HMB and GPU HBM name different resources

HBM means high bandwidth memory; NVIDIA's H100 page describes HBM3 as GPU memory. HMB means Host Memory Buffer, the SSD-controller feature considered here. Similar initials do not connect the allocations.

Keep local capacity per GPU in its own offer field. Neither the number of SSDs nor HM-210's host assignment total increases that capacity. The related GPU-memory guide addresses exact device variants and local capacity; adding unlike memory totals would obscure that decision.

References: [G1]

Make the offer explain what the memory claim buys

Consider a fictional offer listing 128 GiB of host RAM, eight HMB-capable SSDs and a separate 512 MiB SSD cache line. The location and purpose of that last quantity remain unresolved. If the supplier means HM-210's HMB total, those bytes are already included in the host capacity. If it means NAND staging, the quantity belongs inside the identified drives and leaves their host-memory assignments unspecified.

Have the supplier replace the ambiguous line with an identified resource for the exact SSD model and capacity variant. Capability alone does not establish HM-210's stipulated assignments. Treat any performance evidence as a separate claim about a stated workload; neither a larger cache figure nor a clearer memory description proves a faster application.

If a substitute SSD changes the memory architecture, return the account to the storage-selection owner before carrying the original assumptions forward. Keep the revised component description with the chosen server and storage package.

The related power-loss guide addresses protected data and metadata; the page-cache and queue guides explain other uses of host memory. The architecture description here does not establish those outcomes or application fit.

Carry the selected hardware into a physical installation scope

When the storage and platform owners have selected a supported server and SSD package, Leviathan's rack-and-stack service can address agreed equipment mounting, IT cabling, labels and physical installation records. Use the service and project-inquiry links below with a nonconfidential equipment summary, released rack and connection plans, site constraints and required handoff.

Keep HMB support, assignment and workload acceptance with the appointed supplier and technical owners. The physical work package records the agreed installation; it does not establish the memory architecture's performance.

References: [L1]