PCIe Generation and Link Width: Read the Connection the GPU Server Actually Uses

Generation and width describe different parts of one connection

A PCIe link joins two ports through one or more lanes. Each lane has separate transmit and receive signal pairs. An x8 link therefore has eight lanes available in each direction; the receive paths do not make it an x16 link. Full duplex permits traffic in both directions simultaneously.

Generation supplies the transfer-rate context per lane. For the Gen3, Gen4 and Gen5 rates considered here, those rates are respectively 8, 16 and 32 GT/s per lane. GT/s means billions of transfers per second. Width supplies the number of lanes in the identified link, rather than a count of GPUs, slots or network ports.

A one-way transfer uses the capacity in its direction. Adding transmit and receive capacities produces a bidirectional aggregate, not a larger one-way pipe. When a supplier quotes a bandwidth total, establish whether it counts one direction or both before comparing it with a host-to-GPU requirement.

References: [T1][P1][P3]

Separate device capability, slot shape, wiring and negotiated state

Start with the exact device variant and its documented PCIe capability. A card described as capable of Gen4 x16 supplies a maximum device-side description. It does not establish that an offered server connects it at Gen4 x16, or that every product in the advertised family has the same interface.

The slot's mechanical size answers a different question. A physical x16 connector has that connector size; the server or riser may supply fewer electrical lanes. Intel's March 2025 Ethernet 700/800 Series Windows guide explicitly identifies physical x16 slots configured electrically as x8. Read the applicable server and riser documentation for the allocation in the offered configuration.

The operating connection is established through link training. TI's August 2022 overview explains that the configuration stage determines link width and assigns lane identities within the link. The resulting connection uses an established lane group, rather than every lane suggested by the connector's length.

Keep four descriptions visible: device capability, mechanical connector, electrical allocation and negotiated generation/width. The last describes the connection's reported state. The first three help explain what the proposed hardware can supply, but none substitutes for the others.

References: [I1][T2]

Read Current and Max using the reporting tool's definitions

Intel's guide separates current and maximum speed/width fields. NVIDIA-SMI's GPU Link information gives a GPU-specific example: Current describes the present generation and width, while Max describes what the GPU and system configuration together permit. In that definition, Max can reflect a system limitation rather than the GPU's standalone capability.

NVIDIA also states that current values may be reduced while the GPU is unused. Preserve the observation time, device identity, reporting source and activity condition with a supplier's return. A low current value alone cannot diagnose a damaged card or establish the connection available during the required work.

First establish that PCIe is the path relevant to the requirement. NVIDIA notes that some integrated configurations use another primary host-to-GPU interconnect, such as C2C. PCIe fields on such a system need not describe that primary path's bandwidth. The calculations below concern an identified PCIe link.

References: [I1][N1]

Calculate the Gen3–5 quantity after coding alone

PCI-SIG's historical HOTI presentation lists 128b/130b encoding for Gen3, Gen4 and Gen5. For these rates, 128 carried bits occupy 130 transmitted bits. Removing that coding overhead still leaves protocol traffic among the carried bits.

For a connection using that encoding, the one-way decimal GB/s quantity after coding alone is: transfer rate in GT/s per lane × lane count × 128/130 ÷ 8. The final divisor converts bits to bytes. Decimal GB means one billion bytes.

For Gen4 x8, 16 × 8 × 128/130 ÷ 8 = 15.753846… GB/s. For Gen3 x16, 8 × 16 × 128/130 ÷ 8 = 15.753846… GB/s. Gen4 x16 gives 16 × 16 × 128/130 ÷ 8 = 31.507692… GB/s.

These are encoding-only upper quantities. The equality between Gen4 x8 and Gen3 x16 establishes this arithmetic relationship; it qualifies no real card/server combination or substitution. Use 128/130 only when that encoding applies to the link mode. Gen6 and Gen7 require their own mode-specific treatment.

References: [P2][P3]

Useful payload has further overhead and limits

Application data travels within PCIe transactions. Packet headers, integrity fields and link-control traffic consume capacity beyond the coding accounted for above. Altera's AN 855 protocol-overhead explanation distinguishes transaction payload from those additional fields and traffic. Its implementation-specific packet sizes are not a universal efficiency allowance.

Consequently, a quote cannot promise 15.754 GB/s of useful application data merely by identifying Gen4 x8. Nor can it obtain a reliable payload estimate by subtracting one remembered overhead percentage. The useful fraction depends on the transactions and operating conditions; sharing and implementation limits can constrain delivery further.

The boundary also matters. A device-facing PCIe link's quantity is not automatically available throughout the host path or to each device simultaneously. Where traffic crosses a shared upstream link, that relationship needs its own assessment. The linked expansion-hardware article explains bifurcation, switches and retimers; the GPUDirect RDMA article explains the separate GPU-to-NIC path question.

References: [A1]

Compare matching card labels with x8 and x16 reports

Consider two fictional supplier returns, A and B, advertising the same GPU card family. Stipulate that both actually identify the same card variant, capable of Gen4 x16, and a physical x16 connector, using the encoding considered above. These invented entries represent no real supported configuration, observation or test result.

A's configuration documentation identifies an electrically x8 connection. Its reported combination maximum is Gen4 x8, and its current entry is 16 GT/s x8. Those fields agree at the stipulated observation. The x8 entry does not, by itself, show missing lanes relative to that documented allocation.

B's documentation identifies an electrically x16 connection. Its reported combination maximum is Gen4 x16, and its current entry is 16 GT/s x16. The matching device-family label and connector size conceal a different connection width. B's encoding-only quantity is twice A's: about 31.508 versus 15.754 GB/s in one direction.

Now stipulate a buyer requirement for 20 decimal GB/s of useful payload through that PCIe link in one direction. A's 15.754 GB/s upper quantity is already below 20, before further overhead. Under the stated connection, it cannot meet that requirement. B clears this necessary arithmetic screen, but its 31.508 GB/s quantity does not establish that it delivers 20 GB/s of payload.

The appropriate decision is to resolve A's mismatch with the supplier and request applicable support and performance evidence for any candidate still under consideration. The example supplies no reason to call A defective, prescribe a hardware change or declare B suitable. If an actual report omits the electrical allocation or observation conditions, leave those questions open rather than borrowing the missing facts from this example.

References: [P2]

Make the supplier answer the connection and payload questions separately

Request a configuration description that reconciles the exact card, server and riser with the documented electrical allocation and the definitions of reported maximum and current values. A family brochure supplies less information than that configuration-specific return. If the intended requirement concerns operation under load, an unexplained idle snapshot leaves it unanswered.

Ask the supplier to distinguish supported capability, observed link state and delivered performance. Evidence for useful payload needs to identify the transfer direction, endpoints, counted data, interval and operating conditions. A generation/width field is connection evidence; a throughput observation needs its own unit and measurement boundary.

For the fictional 20 GB/s requirement, this distinction changes which offers deserve further evaluation. Arithmetic can eliminate a connection whose upper quantity is insufficient. An upper quantity above the requirement still leaves transaction efficiency, the rest of the path and the actual workload to be established. Matching calculated rates also leaves support and compatibility unresolved.

Carry the selected complete system into the installation inquiry

Once the customer and equipment supplier have selected the complete system, Leviathan's rack-and-stack service is relevant to agreed equipment mounting, physical IT cabling, labels and installation records. Use the service and project inquiry linked below when that selected equipment needs a separately agreed physical installation project.

Share a nonconfidential equipment summary, the appointed supplier, approved rack and external connection plans, site requirements and requested handoff. Internal hardware changes, platform configuration and workload verification need their own appointed scope. This article interprets connection evidence and supplies no field procedure or work approval.

References: [L1]